FIG. 1 illustrates a conventional stack package of individual semiconductor packages. Referring to FIG. 1, the stack package 10 may include a plurality of individual semiconductor packages 20. Each individual semiconductor package 20 may include one or more semiconductor chips 24, a package board 22 and/or solder balls 26. The semiconductor chip 24 may be mounted on the package board 22 via an adhesive 28 interposed between the semiconductor chip 24 and the package board 22. Each individual semiconductor package 20 may be connected by the solder balls 26. The stack package 10 may be assembled by stacking the individual semiconductor packages 20 via a solder reflow process. The stack package 10 may be mounted on a module board 12.
A solder reflow process may be required during assembly of the stack package 10. Additional reflow processes may be required during testing of the stack package 10, particularly if one of the one or more semiconductor chips 24 is found to be faulty or defective during testing. Reflow processes may subject components of the stack package 10 to thermal stresses, including components of the stack package 10 which were operating correctly prior to the reflow process. The thermal stresses may damage connections, cause short circuits, warping, and other faults.